CORR-8BIT-XM-UT2【PDF 1/10 页】SITE LICENSE IP CORRELATOR XP

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Correlator IP Core

April 2005

Features

■ Supports 1- to 8-Bit Input Data Width

■ Supports 1 to 256 Channels

■ Supports a Correlation Window from 8 to

2048 Taps

■ Supports Oversampled Input Data from 2x

to 8x

■ Supports Real Correlations for Either

Signed or Unsigned Data

■ Supports Complex Correlations for Signed

Data

■ Allows the User to Tune the Performance of

the Design by Specifying the Values of

Several Parameters

■ Provides a Selectable Input FIFO for

Maximum Data Throughput

■ Allows the User to Specify the Number of

Coef?cient Sequences Desired, from 1 to

256

IP Data Sheet

Introduction

The function of this core is to correlate an incoming data

stream to a stored binary pattern called a code

sequence or coef?cient sequence. The data stream

may be binary or multi-valued, either signed or

unsigned, and is provided to the core one sample at a

time. The core can be con?gured to perform either a

real correlation with a single data input stream and a

single coef?cient sequence, or a complex correlation

with two input data streams representing the real and

imaginary input terms, and two coef?cient sequences

representing the real and imaginary coef?cients.

The core provides multiple channel capability and can

support up to 256 channels. Correlations for each chan-

nel operate independently from each other. Also, up to

256 different coef?cient sequences may be stored in the

core, and each channel can select which coef?cient

sequence is correlated to that channel, so one coef?-

cient sequence could be used for all 256 channels if

desired.

Figure 1. Correlator IP Core External Interface Diagram

clk

rst

irdy

din[n:0]

Correlator

din_im[n:0]

chan_in[n:0]

code_sel_in[n:0]

b lock_start_in

decim_r[n:0]

n u mtaps_r[n:0]

crdy

ordy

do u t[n:0]

do u t_im[n:0]

chan_o u t[n:0]

b lock_start_o u t

se q _err

coeffaddr[n:0]

coeff w dat_im[n:0]

coeff w dat[n:0]

coeff w r

? 2005 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand

or product names are trademarks or registered trademarks of their respective holders. The speci?cations and information herein are subject to change without notice.

The product described herein is subject to continuing development, and applicable speci?cations and information are subject to change without notice. Such speci?ca-

tions and information are provided in good faith; actual performance is not guaranteed, as it is dependent on many factors, including the user's system design.

www.latticesemi.com

ip1039_01.0

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